Computer Architecture (2015/2016)
Bachelor Informatica 2de jaar, Universiteit Leiden
Course objectives & learning topics
Develop qualitative and quantitative insight into the trade-offs of the major technological developments in computer architecture in the last twenty years.
- Instruction set architectures
- Processors: pipelines, hazards, multiple issue and out-of-order execution
- Memory: SRAM/DRAM tradeoffs, access times, hierarchy
- Caches: associativity, indexing
- Multi-cores & hardware multithreading
- Vector processors & VLIW
IMPORTANT: to enroll in this year's labs, fill in the following questionnaire. It is mandatory to submit name and student ID, all other questions are optional.
Location: Universiteit Leiden, Snellius Building. Lectures will be in room 174.
Lectures: See the LIACS Roosters
Contact & staff
In addition to the regular lab hours on Monday, every Thursday from 11.00 to 12.00h assistance will be available to answer questions about the lab assignments. Room: 411. (Note that Room 411 is not equipped with ULCN workstations, but web browser and ssh client are available, so you can only access your data of your ULCN account through ssh).
Assistance and course communication will take place on the mailing list firstname.lastname@example.org. You can subscribe to the group on this page, click the "subscribe to this group" link.
Additionally, assistance is available through IRC. This assistance is not available 24/7, but we try to answer questions on a best effort basis. We will use the freenode network and the #ca2015 channel. You can connect to irc.freenode.net using your favorite IRC client. (Note: within LIACS you might want to connect to port 8000 instead of the default 6667 which may be blocked). For more information see here.
One can also connect to the freenode network using a Web IRC client: https://webchat.freenode.net. As channel, fill in #ca2015.
IRC is not very suited for pasting long error reports from compilers, doing so "floods" everybody's screen with your compilation errors. If you need help with a compilation error, please first paste the output in "a pastebin": http://pastebin.com. After pasting your text and clicking "Submit", you will be redirected to a new temporary URL with a seemingly random name. Instead of pasting the long error report in the IRC window, paste this random URL instead and people can access your error report through that URL.
Weekly homework assignments: 20%
Lab assignments: 50%
Final exam: 30%
To pass the course you must obtain a passing grade separately for 1) homework + final exam and 2) lab work.
The software tools required for this course are C cross-compilers for Alpha and RISC-V, MGSim compiled for Alpha, and a working MGSim source tree to develop your own RISC-V ISA simulation. You can obtain these tools in either of two ways:
- On the LIACS computers (and remotely by logging into "huisuil01" from "sshgw"), using the installation already performed by
your assistants. You can obtain this by entering the following command:
If you cannot access this directory, contact the assistent ASAP and mention your ULCN username!
Then you need to obtain your own copy of MGSim, according to the section "Installing MGSim" of the self-install guide. The "compatible" or "compliant" C++ compiler on the LIACS setup is called ca2015-g++.
- Installing all the tools manually using this self-install guide.
(This section will be populated as the course moves forward)
General support documentation:
- Henessy & Patterson, Appendix A
- Alpha Architecture Reference Manual, Fourth edition
- The RISC-V Instruction Set Manual. Volume I: User-Level ISA
- What every programmer should know about processors and memory
Article for week 12-13 homework: Cekleov, M. and Dubois, M., Virtual-address caches. Part 1: problems and solutions in uniprocessors. Only the first part is relevant for the assignment, but for interested readers the references cited in part 1 are listed at the end of part 2.
Article for lab assignment 4: Tse-Yu Yeh and Yale N. Patt.
Previous exams: see the web site of the Leidse Flesch.
Previous editions of this course: